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AD9114/5/6/7 output stage voltage compliance

Question asked by Marc_2 on Apr 11, 2014
Latest reply on Apr 16, 2014 by Tguy

I have a question regarding the main DAC output of the AD9114 / AD9115 / AD9116 / AD9117.

 

Power is +3.3 V and for many reasons (cost, space, voltage supply and others) we need to get as much power as possible from the output stage to avoid an extra amplification stage. This means the FS current will be close to 20 mA and the impedance seen by the DAC output should be as high as the voltage compliance allows.

 

Differential to single-ended conversion is performed by a transformer as shown on Figure 102 of the Datasheet, which says the voltage compliance is 1 V at 20 mA FS current (page 44) and 0.8 V at 8 mA FS current (page 5).

 

I wonder what is the best center-tap voltage for optimum linearity. Is it 0 V ?Thus, one DAC outputs will be driven to negative potentials while the other is positive, reaching the threshold voltage of some intrisinc diode below -0.5 V.

 

Or should we introduce a parallel RC network between the center-tap and ground, so the center-tap would be at a slightly positive voltage ? This is what would happen if we used the internal resistors. But in transformer-coupled applications, the Datasheet does not recommend using the RLIN/RLIP/RLQN/RLQP pins.

 

Thanks for you opinion - we don't want  a poor design to compromize the AD9116's performance !

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