I am working in CM403 ADCC(ADC controller).
I have read the Engineer to Engineer note(EE365v01.pdf) about Maximizing ADC Sampling Rate on ADSP-CM403 and I need clarification in finding out the sampling frequency for ADC.
In page 6 ADC Interface Timing Configuration,
1.It is mentioned that ADC conversion time is 380 ns with ADC clock set to 50MHz.But as per the ADC(SAR) formula,conversion time T = n/f where n is ADC resolution(16 bit ADC),f is the ADC frequency or Sampling rate.As per this formula T= 16/50MHz = 320 ns.
Can somebody please explain how the conversion time is arrived to be 380 ns instead of 320 ns?
2.How and what basis the values TCSCK = 1, NCK = 8, TCKCS = 0 and TCSCS = 10 are chosen?
3.The ADC conversion time 380 ns is always constant or it varies with ADC frequency(Sampling rate)?
4.Sampling rate,Sampling frequency,ADC frequency & ADC clock represents the same term? if not please explain the difference?
Please help me by answering these queries.It will be highly helpful.
thanks a ton in advance,