I'm in a new development with ADDI9020.
I have a datasheet rev. SpB. The datasheet contains a description about the recommended power up sequence and vertical timing generation (page 45-step5/h, page 27/4.). Both place refer to 0x4000... memory location but there is no other details about this memory range.
I have checked the reference design (ADDI9020 with ICX692 demo board), but there is no further information.
Do anybody has information about this issue?
Do I need a specific sw tool to generate a loadfile to configuring the Vpat/seq./field parameters?
Any help/examples/info would be very useful.