I am using the AD9361 chip for my application. First i am working on Transmitter Path, for this i enabled clock output and i configured BBPLL, RF PLLs in both sections and i want to see LO leakage in TX output. How much level we can get in Tx output port of LO signal?
I want you know how to control the gain/attenuation of Tx path? and how much LO level will be generated by PLL to mixer?