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Sync Detection in ADV7441A

Question asked by msauer on Mar 17, 2014
Latest reply on Mar 20, 2014 by DaveD



we use the ADV7441A to digitize a RGB signal with H/V Sync. HSync is a signal with 24.452kHz period and pulse with of 6us (pixel clock=45.04MHz) and VSync with 16.81ms period and 1.5ms pulse with (37 lines). The SSPD block has the problem that for some lines the polarity of the VSync will be misrecognized an so the output of the vsync has also a change in the polarity. The problem occurs in at vsync pulse with above 10 lines.

If I set the polarity manual than the output vsync will be stable but register 0xb5 in user map will recognize an polarity change.

Is there a solution for this problem?


Thank you for your help.

best regards


martin sauer