I'm actually working on a design with AD9268 in CMOS output configuration and an FPGA. The issue I'm struggling with is a statement in the datasheet of AD9268:
"Applications requiring the ADC to driver large capacitive loads or large fanouts may require external buffers or latches"
I could not find an explicit number that describes "large" with respect to capacitive loads.
My question is, starting at what load, I need to consider using an external buffer?
The FPGA I'm using specifies an absolute worst case input capacitance of 8pF on the pins I'm planning to use.
Ideally I don't need any external components like buffers or resistors (termination is done inside the FPGA), but I don't want to sacrifice performance of course.
Does anybode have experience with this or compareable converters and the digital outputs?
Thanks, best regards