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Building a program LDR bootable image for UBoot

Question asked by LeTriColor on Mar 6, 2014
Latest reply on Mar 10, 2014 by Aaronwu

Hello,

 

I am interested in understanding how can I build an LDR that can be formatted to be booted by uboot. 

 

To provide you with some background.  I have created a simple program that i have debugged using CCES for the BF609-EZKIT that will toggle an LED when i push one of PB1 or PB2.  I have used the IDE and I have ensured that this program is working.  I have also built an LDR file for this program and have verified that using CLDP if i load this file into flash it works as expected. 

 

Now i have erased the entirety of the flash and used CLDP to flash a the uboot LDR and i have connected to it using the UART.  i can see from my terminal that uboot is successfully loaded into flash and is booting as expected.  i used the loadb 0x01000000 command to send the LDR file that i previously created with CCES for the LED toggling program into memory address 0x01000000.  I then issued the bootldr 0x01000000 command and i get an error message from uboot as shown below.

 

Do i need to compile the LDR file differently?  Can CCES build a uboot image that is able to be used?  Have i misunderstood how i can use uboot and boot a simple program?

 

Thanks!

 

Ack! Something bad happened to the Blackfin!

 

SEQUENCER STATUS:

SEQSTAT: 0000002b  IPEND: 2832  SYSCFG: 20210002

HWERRCAUSE: 0x0:

EXCAUSE   : 0x2b: icplb prot violation

physical IVG11 asserted : <0x07f405c0> { _evt_default + 0x0 }

physical IVG13 asserted : <0x07f405c0> { _evt_default + 0x0 }

RETE: <0xffa00000> { _bfin_reset + 0x0 }

RETN: <0x07ebf2a0> /* unknown address */

RETX: <0xff7ffff8> { ___ashldi3 + 0xf7898c0c }

RETS: <0x07f427fa> { _do_bootldr + 0x6e }

RETI: <0x07f4010c> { _start + 0x10c }

DCPLB_FAULT_ADDR: <0x07ebf2ac> /* unknown address */

ICPLB_FAULT_ADDR: <0xff7ffff8> { ___ashldi3 + 0xf7898c0c }

 

PROCESSOR STATE:

R0 : 01000000 R1 : 00000000    R2 : 00000000    R3 : 00000006

R4 : 00000000    R5 : 07ebff44    R6 : 00000001    R7 : 00000000

P0 : 07ebeea3 P1 : 00000424    P2 : ef000008    P3 : 07f7a494

P4 : 00000000 P5 : 01000000    FP : 07ebff00    SP : ffb00f18

LB0: 07f41418 LT0: 07f41416    LC0: 00000000

LB1: 07f5fa3e    LT1: 07f5fa3a    LC1: 00000000

B0 : ffb00000    L0 : 00000000    M0 : 00000018    I0 : 07ec0528

B1 : 00000000    L1 : 00000000    M1 : d3c0d499    I1 : 07f7a494

B2 : 00000000 L2 : 00000000    M2 : 7344a79c    I2 : ff901034

B3 : 00000000 L3 : 00000000    M3 : 935080d1    I3 : ffe01240

A0.w: 0083ce21   A0.x: 00000000   A1.w: 0000372f   A1.x: 00000000

USP : ffb00ff4  ASTAT: 02001065

 

Hardware Trace:

   0 Target : <0x07f41134> { _trap_c + 0x0 }

     Source : <0x07f40434> { _trap + 0x6c }

   1 Target : <0x07f403c8> { _trap + 0x0 }

     Source : <0xff7ffff6> { ___ashldi3 + 0xf7898c0a }

   2 Target : <0xef000008> { ___ashldi3 + 0xe7098c1c }

     Source : <0x07f427f8> { _do_bootldr + 0x6c }

   3 Target : <0x07f427e6> { _do_bootldr + 0x5a }

     Source : <0x07f41ae6> { _dcache_disable + 0xe }

4 Target : <0x07f41ad8> { _dcache_disable + 0x0 }

     Source : <0x07f427e2> { _do_bootldr + 0x56 }

   5 Target : <0x07f427e2> { _do_bootldr + 0x56 }

     Source : <0x07f41ab2> { _icache_disable + 0xe }

6 Target : <0x07f41aa4> { _icache_disable + 0x0 }

Source : <0x07f427de> { _do_bootldr + 0x52 }

7 Target : <0x07f427de> { _do_bootldr + 0x52 }

     Source : <0x07f4a5e0> { _printf + 0x44 }

   8 Target : <0x07f4a5d4> { _printf + 0x38 }

     Source : <0x07f57d50> { _uart0_puts + 0x20 }

   9 Target : <0x07f57d44> { _uart0_puts + 0x14 }

     Source : <0x07f591b0> { _hw_watchdog_reset + 0xc }

  10 Target : <0x07f591a4> { _hw_watchdog_reset + 0x0 }

     Source : <0x07f57d06> { _uart_putc + 0x32 }

  11 Target : <0x07f57cf2> { _uart_putc + 0x1e }

     Source : <0x07f57cf6> { _uart_putc + 0x22 }

  12 Target : <0x07f57cf2> { _uart_putc + 0x1e }

     Source : <0x07f57cf6> { _uart_putc + 0x22 }

  13 Target : <0x07f57cf2> { _uart_putc + 0x1e }

     Source : <0x07f57cf6> { _uart_putc + 0x22 }

  14 Target : <0x07f57cf2> { _uart_putc + 0x1e }

     Source : <0x07f57cf6> { _uart_putc + 0x22 }

  15 Target : <0x07f57cf2> { _uart_putc + 0x1e }

     Source : <0x07f57cf6> { _uart_putc + 0x22 }

 

kgdb: handle_exception; trap [0x7]

               $T0735:f8ff7fff;0e:ccf1eb07;#00

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