We are currently doing pre-scan EMC testing on a development platform board that uses the ADV7610 as a single input HDMI Receiver. We have observed emissions that radiate from all cables that attach to the PCB via shielded or grounded connectors. The worst case emission fails FCC Class B/CISPR 22 Class B Limits at 222.8 MHz by 2 to 6 dB, dependent on cable configuration. There are other measurable harmonics at 74.25 MHz, 148.5 MHz, and 371.25 MHz. We have concluded that the source of the emission energy is the Pixel Output Bus from the ADV7610. We can show this by alternately Tristating and Enabling the pixel bus while maintaining HDMI lock status. The HDMI input content is 1080p60 video which generates a 148.5 MHz pixel clock output. Our bus configuration is 16 bit SDR 4:2:2. With the pixel clock running at 148.5 MHz, the fundamental data switching frequency is half of the clock, or 74.25 MHz. Our problem frequency is the 3rd harmonic of the data switching frequency (222.8 MHz).
Given that we require a pixel clock frequency greater than 100MHz, we are following the convention suggested by Analog and using the High Drive setting for the pixel clock and bus. Observation of the signal rise and fall times shows that this is the correct choice of drive level for signal integrity and timing on the bus. This means it is not reasonable to lower the drive level on the bus to reduce emissions. We are currently using 39R series terminations on the bus and driving a single set of CMOS inputs. We also have another device on the bus (ADV7181D) that is tristated during HDMI operation. We have physically removed the ADV7181 from the bus and observed no change in emissions.
Our PCB is a multilayer design with dedicated ground and power layers. We have created a +3.3V plane on one layer of the board that supplies the digital power inputs of the ADV7610. We use the capacitor and ferrite power filtering structure as indicated in the document titled PCB Layout and Power Supply Design Recommendations for HDMI RX Products (Digital Video Group, Analog Devices.April 2011. Rev. A). At the frequency of concern, the majority of our power supply decoupling will be derived from the inter-plane capacitance anyways. The ground pins of the ADV7610 are connected with vias to the ground plane which is the first layer below the surface on the PCB.
Is this a problem that has been noted before? Are there known differences in the ability of the different HDMI receivers (ADV7610, ADV7611, ADV7612) to drive 16 bits without significant ground bounce? Do you have recommendations that we could apply to reduce the amount of disturbance caused on our ground plane?