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ad9467 device driver

Question asked by shaneljsss on Feb 23, 2014
Latest reply on Feb 26, 2014 by shaneljsss

Hello,

 

I have linaro running on my zedboard I successfully ran the adv7511 reference design with the hdmi output. I tried to run the AD9467 reference design without the chip scope logic... I couldn't get the AD9467 driver to register successfully this is the output:

 

cf_axi_adc 79000000.cf_ad9467_core_0: Device Tree Probing 'cf_ad9467_core_0'

platform 79000000.cf_ad9467_core_0: Driver cf_axi_adc requests probe deferral

 

 

This is my DTS file :

/dts-v1/;

 

/include/ "zynq-zed.dtsi"

 

/ {

                    fpga_axi: fpga-axi@0 {

                    compatible = "simple-bus";

                    #address-cells = <0x1>;

                    #size-cells = <0x1>;

                    ranges;

 

                              axi_spi_0: axi_spi@42000000 {

                                        compatible = "xlnx,axi-spi-1.02.a", "xlnx,axi-spi-2.00.a";

                                        #address-cells = <1>;

                                        #size-cells = <0>;

                                        interrupt-parent = <&gic>;

                                        interrupts = <0 57 4>;

                                        reg = <0x42000000 0x10000>;

                                        xlnx,family = "zynq";

                                        xlnx,fifo-exist = <0x1>;

                                        xlnx,instance = "axi_spi_0";

                                        xlnx,num-ss-bits = <0x2>;

                                        xlnx,num-transfer-bits = <0x8>;

                                        xlnx,sck-ratio = <0x20>;

                              };

 

                              axi_dma_0: axi_dma@40400000 {

                                        compatible = "xlnx,axi-dma";

                                        #address-cells = <1>;

                                        #size-cells = <1>;

                                        #dma-cells = <1>;

                                        #dma-channels = <1>;

                                        reg = <0x40400000 0x1000>;

                                        xlnx,include-sg = <0x0>;

                                        xlnx,num-fstores = <0x3>;

                                        dma-channel@7C400000 {

                                        compatible = "xlnx,axi-dma-s2mm-channel";

                                        interrupt-parent = <&gic>;

                                        interrupts = <0 56 4>;

                                        xlnx,datawidth = <0x40>;

                                        xlnx,genlock-mode = <0x0>;

                                        xlnx,include-dre = <0x0>;

                                        };

                              };

 

 

                              axi_adc_1c_0: axi_adc_1c@79000000 {

                                        compatible = "xlnx,axi-adc-2c-1.00.a","xlnx,axi-adc-1c-1.00.a";

                                        reg = < 0x79000000 0x10000 >;

                                        dma-request = <&axi_dma_0 0>;

                                        spibus-connected = <&axi_spi_0>;

                                        xlnx,cf-buftype = <0x0>;

                                        xlnx,dphase-timeout = <0x8>;

                                        xlnx,family = "virtex6";

                                        xlnx,num-mem = <0x1>;

                                        xlnx,num-reg = <0x1>;

                                        xlnx,s-axi-min-size = <0x1ff>;

                                        xlnx,slv-awidth = <0x20>;

                                        xlnx,slv-dwidth = <0x20>;

                                        xlnx,use-wstrb = <0x0>;

                              };

 

                    };

};

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