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does adv7181 support HDMI-->HVSYNC+RGB(720P,1080P) INPUT?

Question asked by zhangzhanxiao on Feb 16, 2014
Latest reply on Feb 19, 2014 by zhangzhanxiao

Dear support Engineer:

   we use adv7181c in our design for this :

1:we use freescale imx6 ,bt1120 input(16bit data bus);

2:adv7181c's input source  is the output of convert ic (HDMI-hv sync +RGB  we already confirm the ic can output 720p HV SYNC+RGB),we use the script (GR mode ) from forum。

we work for it for over two weeks ,but adv7181c always give 'free running' info ,we messusure the output pin (D19-D12 ,D9-D2  16 BIT DATA BUS),they have output signal(but not check right or not),the vsync is 60hz ,pixel clock is 40MHZ

 

My question is : can adv7181c support this signal :

1280x720 60hz (HSYNC+VSYNC+RGB)

720x480 60hz (HSYNC+VSYNC+RGB)

all this signal is from HDMI->HSYNC+VSYNC+RGB

below is my script

Table 14 ADV7181C settings to sample SVGA (800x600 @ 60Hz) video

Word address   Value Comment

adv7180_write_reg(0x05,0x02);

adv7180_write_reg(0x06,0x01);

adv7180_write_reg(0x03,0x08);

adv7180_write_reg(0x8F,0x00);

 

adv7180_write_reg(0x1D,0x47);

adv7180_write_reg(0xC3,0x46);

adv7180_write_reg(0xC4,0xB5);

adv7180_write_reg(0x3A,0x11);

adv7180_write_reg(0x3B,0x81);

adv7180_write_reg(0x3C,0x5D);

adv7180_write_reg(0x6A,0x00);

adv7180_write_reg(0x6B,0x83);

adv7180_write_reg(0x73,0x90);

adv7180_write_reg(0x7B,0x8E);

adv7180_write_reg(0x85,0x03);

adv7180_write_reg(0x86,0x0B);

adv7180_write_reg(0xF4,0x25);

adv7180_write_reg(0x52,0x00);

adv7180_write_reg(0x53,0x00);

adv7180_write_reg(0x54,0x07);

adv7180_write_reg(0x55,0x0C);

adv7180_write_reg(0x56,0x94);

adv7180_write_reg(0x57,0x89);

adv7180_write_reg(0x58,0x48);

adv7180_write_reg(0x59,0x08);

adv7180_write_reg(0x5A,0x00);

adv7180_write_reg(0x5B,0x20);

adv7180_write_reg(0x5C,0x03);

adv7180_write_reg(0x5D,0xA9);

adv7180_write_reg(0x5E,0x1A);

adv7180_write_reg(0x5F,0xB8);

adv7180_write_reg(0x60,0x08);

adv7180_write_reg(0x61,0x00);

adv7180_write_reg(0x62,0x7A);

adv7180_write_reg(0x63,0xE1);

adv7180_write_reg(0x64,0x00);

adv7180_write_reg(0x65,0x19);

adv7180_write_reg(0x66,0x48);

adv7180_write_reg(0x0E,0x80);

adv7180_write_reg(0x52,0x46);

adv7180_write_reg(0x54,0x00);

adv7180_write_reg(0x0E,0x00);

adv7180_write_reg(0x73,0xD0);

adv7180_write_reg(0x74,0x04);

adv7180_write_reg(0x75,0x01);

adv7180_write_reg(0x76,0x00);

adv7180_write_reg(0x77,0x04);

adv7180_write_reg(0x78,0x08);

adv7180_write_reg(0x79,0x02);

adv7180_write_reg(0x7A,0x00);

Outcomes