How do you change register settings for AD-FMCOMMS1-EBZ Linux ML605?
1) FPGA Reference Designs: PCORE Register Map has a heading Address which is broken down to DWORD and BYTE. Please explain.
a) Is the absolute address = DWORD + BYTE?
2) How do you half the DAC AD9122 sampling rate?
a) Is RATE or CLK_FREQ and CLK_RATIO?
b) How do change it from 500 MHZ to 250 MHZ which is the rate of the ADC?
3) How do you select DDS Data for the DAC and set the Frequency?