AnsweredAssumed Answered

ADP1047, PFC output voltage regulation

Question asked by AER on Feb 3, 2014
Latest reply on Feb 28, 2014 by AER

Hi

I'm working on a PFC input stage built around an ADP1047. The input is 230 volt 50 Hz, the output 385 volt DC and the maximum power

is supposed to reach 2100 Watt.

It's working quite nicely up to a power level of about 800 Watt. If the load is increased any further the output voltage begins to sag, still

with an excellent power factor, until it hits peak input voltage. Adjusting the voltage loop filters seems not to help. I observed the

Voltage Loop Output Register 0xFE38 and found the following behavior:

 

          at idle:          00100000    

          300 Watt:     00101011

          600 Watt:     00110110

          900 Watt:     00111110

 

I think that's odd, I expected that register to show around 0 at idle and approach 11111111 when the output voltage starts to sag.

 

Any ideas would be appreciated!

Outcomes