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AD9914 Data Sheet discrepancies?

Question asked by nmrcarl on Jan 20, 2014
Latest reply on Mar 6, 2018 by jferment

In the AD9914 data sheeet (Rev C), there are some discrepancies concerning register CFR2, and pins SYNC_CLK, and SYNC_OUT:


1) On page 5, under SYNC_OUT Output Driver, there is a note about "CFR2 register, Bit9=1"; on page 41 (table 16), Bit 9 is marked "Reserved" and "Keep Logic 0".  Which is correct?  What does CFR2 have to do with SYNC_OUT?


2) On page 34 (table 14, Register Map), CFR2 Bit 9 is shown as "Open", but the default value (right-hand column) is apparently =1.  What is the significance of this?  How should the host set this bit?


3) The specification for the SYNC_CLK Output Driver (page 5, Table 2), does not show the expected load or voltage swing.


Could someone please provide the correct information?