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AD2S1210 Fault Register

Question asked by starraytheon on Jan 20, 2014
Latest reply on Feb 6, 2014 by starraytheon

Hi Experts,

 

I am learning about AD2S1210. I think the 0xFF reg is very important.

 

In Spec page23, Table26 Fault Register Bit Descriptions

 

D7--D0 bit have shown some fault status.

 

For preventing the fault, I want to get the guide rule.

 

Such as, for D7, I set the external buffer gain carefully. Do shield in the twist pair line.

 

Additionally, set the 2.5V ref DC bias to Sin/Cos input.

 

Can you give more detail proposal in this? from D7 to D0, which more considerations are?

 

I appreciate the reply from you, Thanks for your help!

 

 

Yours Sincerely,

Tom

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