The BW_RATE register’s Rate bits define both the bandwidth and ODR. The ADXL375 datasheet states that the bits must be set to ‘1101’ (ODR=800, bandwidth=400) to run the I2C interface at 400kHz. It also states that “selecting an output data rate that is too high for the communication speed may result in samples being discarded.
Question: Can the part be configured such that the BW_RATE register’s Rate bits are set to ‘1111’, and still communicate via the I2C bus at 400kHz? What we would like to do is configure the part to run in trigger mode, and following a trigger, read the data from the part so that we can characterize the shock event after the fact… and we need the 3200Hz ODR to do that. Running in this mode, we would not be worried about missing samples.