Can you guys clear this up. It is confusing.
In reality there are two clock outs (not shown on the block diagram). To ensure that the delay between the clock out from the AD9548 has exactly the same delay on the master as the slave - you connect from the clock out A (J9) to the master clock in (J1), and from the master clock out B (J10), to the slave block clock in (J1). You also need to connect the sync pins on the master (P2 - it's the single .1" connector pin I always poke myself with) to XP1.3 (AD9523_SYNC_2) and the sync pin on the slave to the XP1.1 (AD9523_SYNC_1) - this provides a one shot, which syncs the two AD9523's together.
Then everything should work.
I have a spread sheet on my interpretation.
What software changes are necessary?