I want to use the AD9912 evaluation board with a 10 MHz external input clock to generate a sine-wave of 50-250 MHz frequency.
I have tested the AD9912 Evalation board Z, rev. B board today with mixed results. Here is an image:
For this test I took the 10 MHz external clock from an Agilent 33120A
I have a couple of problems/issues:
In the evaluation software, the only "DDS Clock" settings I can get to work are the following:
Ext clock: 10MHz
Bypass multiplier: OFF
x2 reference: ON
CP Current 375 uA
VCO range: Auto
If I change any of the above settings (for example Multipler to x40), the Output Freq. number does not correspond to the actual output frequency anymore. Since I only need about 250 MHz maximum output frequency I would want to use the 10MHz clock with 2x and 40x multiplication.
Could someone confirm how to use the evaluation software in order to use any other settings? Or is there a bug in the evaluation software?
With the only settings that work (120x total PLL multiplication), I get an output frequency corresponding to the "Output Freq." setting, but with strong side-bands at multiples of 10MHz, the strongest being only 18-20 dB down from the fundamental DDS output.
Are there any settings I can change to suppress these sidebands?
Strangely, when I disconnect my external clock, i.e. NO clock input whatsoever to the DDS, the output looks much cleaner. Apparently the DDS now runs on some internal clock(??), and the output frequency differs by a few percent from the programmed frequency (97 and 195 MHz output when programming 100 and 200 MHz).
If the only way to get a clean output from the AD9912 is to supply a clean SYSCLK at 800-1000MHz or so, can you recommend a high quality PLL or other circuit that can be used to generate the SYSCLK from a 10 MHz external clock?
thanks for any input and help!