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ADV7341 Test pattern problem

Question asked by Vladi215 on Dec 19, 2013
Latest reply on Dec 19, 2013 by GuenterL



I am using the ADV7341 component, I would like it to create test pattern and therefore I configure it according to table 61 of the datasheet revision C, in other words i write 0x00<=0xfc, 0x82<=0xc9, 0x84<=0x40.


At the component DAC 1-3 outputs I receive a very noisy picture, it seems as if some kind of data is integrated into my video output. for examle at VSYNC arear i notice noice pulces of aproximatly 0.5us that apear randomly.


The component receives data at it's digital input and synchronization pins. Is it possible that this input data interferes with the test pattern output?

Are the input pins ignored when the component configured to produce test pattern?


Best regards,


Vladi Dibnis