This question is about how to speed up the simulation speed on VisualDSP++ 5.1 for SHARC processor and I would appreciate any suggestions/advices.
I have developed an audio processing algorithm on Matlab and now trying to transplant it into DSP platform. Since the algorithm is data-dependent, a sample-to-sample comparison procedure is needed to make sure the output of DSP code is exactly as Matlab's. Moreover, in order to observe the performance, tens of seconds audio samples should be processed and recorded by simulator. (using fread() and fwrite() functions)
Now I have a working version of DSP code of the algorithm on my VisualDSP++ simulator, however, the simulation speed is too slow to be satisfied: It takes about 25 min to process a single second audio samples (48K samples per second). Such an inefficiency would lead us a big problem in future work.
After went through ADI's doc and I found the following info:
… VisualDSP++ includes two types of Blackfin simulators: a cycle-accurate interpreted simulator and a functional compiled simulator … compiled simulator runs more faster …
Our hardware platform uses SHARC 21488/89 processors, is the same information applied on 21488 as well ? How can I switch to the faster simulator ?
PS: why I am not using emulator for this case? Because it is difficult to inject exactly the same audio samples to the hardware as with the Matlab, moreover, I need make sure the algorithm porting doesn't go wrong before put other stuffs into the DSP code (DMA, timer, interrupts, etc.)