VisualDSP++ 5.0 C/C++ Compiler Manual for SHARC Processors describe why 40 bit operation is absent.
I want to debate about this.
As datasheet is written:
Where possible, the compiler will attempt to perform constant folding (the simplification of constant expressions at compile time). The results of floating-point constant folding may be different from the results generated by performing the same calculation using the SHARC processor’s 40-bit arithmetic.
You should make a special 40bit constant.
The compiler will sometimes use the integer PASS instruction ("Rx= PASS Ry;") to copy a floating-point value from one register to another. This operation will result in a 40-bit value being truncated to a 32-bit value. It is not possible to predict whether the compiler will use this instruction—it depends on many factors, such as the code sequence being compiled and whether optimization has been enabled.
You should use Fx= PASS Fy to copy a floating-point value from one register to another.
By default, data memory (including the stack) is configured as 32 bits wide, so any data stored to memory will be truncated from 40 bits to 32 bits. It is not possible to anticipate exactly when the compiler will place data in memory (especially when the optimizer has been enabled), meaning that it is not possible to guarantee that all 40 bits of a calculation will be preserved. For example, when preserving the value of a local variable across a function call, the compiler can either store the variable on the stack (which truncates it) or store it in a preserved register (for example, R3 which will preserve
all 40 bits). As before, the behavior in depends on many factors such as the code sequence and optimization.
The customer must to use 40 bit wide stack if he/she want 40 bit float operations.