I'm using AD9129 Evaluation Board, DAC-FMC Interposer & Xilinx ML-605 Reference Design
and I have several questions.
I followed the step-by-step procedure outlined on your wiki (http://wiki.analog.com/resources/fpga/xilinx/interposer/ad9129)
and was expecting to see a tone at 300MHz (as outlined in the wiki); however, on my system, the tone is present at 257.1167MHz.
My first question is: why is the RF tone present at 257.1167MHz and not at 300MHz?
For my evaluation, I would like to test the AD9129's passband flatness and spurious performance in my band of interest, so I was hoping to be able to change the tone frequency on the fly.
Looking at the regmap.txt file in the pcores directory it looks like the dds_scale field might be able to allow me to change the digital tone's frequency.
Can the registers outlined in the regmap.txt file be accessed/modified on the fly? If so, then how does one access them?
Thanks in advance,