I am thinking about using AD9910 in my circuit. I see on the datasheet that the PLL multiplier can be set to 12x to 127x of the reference clock. however, i need to use a 100MHz oscillator as the reference clock for AD9910, which means I need a 10x setting. So can I set the REFCLK PLL feedback divider to 10 to lock the system clock to reference clock? Thanks.