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ADV7343 sync generation issue

Question asked by AndyWaller Employee on Dec 3, 2013
Latest reply on Dec 5, 2013 by PaulS

I’ve managed to output the colour bar test pattern for both NTSC and PAL however when I attempt to drive the device with my own output the screen does not recognise the video signal. I suspect this is because the 7343 is only generating the sync for the odd field – I’ve seen this with a scope (which only triggers on the odd field when I don’t use the test output) and compared it to the test output.

 

I’m putting the device into slave mode 2 by writing 0x0C to address 0x8A. According to the datasheet in this mode a coincident low transition of hsync and vsync indicates the start of an odd field. A low transition on VSYNC when HSYNC is high indicates an even field. Oddly my scope trace that triggers on the odd field shows vsync transitioning to low whilst hsync is high. Is this an error with the data sheet? I’m pretty certain I’m meeting these conditions as I’ve seen it occurring in both simulation and with a scope.

 

Are there any other requirements for the hsync, vsync timings? For example does it matter when VSYNC transitions to high?

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