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SPI in Slave mode using CCES drivers

Question asked by jgoulet on Nov 25, 2013
Latest reply on Dec 9, 2013 by jgoulet

Hi,

I am working on creating a driver for SPI in slave mode. As I understand it, an exchange of data takes place during a transmission that is initiated by the master. Therefore, whatever was in my transmit register (TBDR) gets transmitted on the MISO line and the receive register (RDBR) gets filled with the data transmitted on the MOSI line. My issue is that I receive the data on the MOSI line correctly but the data I want to send during the next data transmission is always offset by one. For example, say I receive a 0x03 and I want to send a 0x61 on the next data exchange as an acknowledgement that 'yes i received a 0x03'. So after the 0x03 the master sends a 0x00 as sort of an empty message so it can receive my response. The problem is that it takes an additional empty message for the slave to respond with the 0x61. Here is a visual:



This is what I would hope to see:

 

Master

0x030x00
0x00
0x000x610x00

Slave

 

This is what I am seeing:

 

Master

 

0x030x00
0x00
0x000x000x61

Slave

 

I am using an interrupt to determine what the received message was and to populate the transceiver buffer with the correct response. Then I use the adi_spi_SubmitBuffer to fill the TBDR buffer for transmission. I tried calling adi_spi_SubmitBuffer from within the interrupt but it does not seem to work so I call it in my main loop when it returns from the interrupt. The message always seems to be 1 message to late. I confirmed this by echoing back what I received and the echo was always sent (or received) 2 messages later when it should have appeared 1 message later. We have debugged this and also used an o-scope to troubleshoot this. What am I doing wrong?

 

All the examples in CCES are for master mode and don't show how to continuously receive and transmit data using interrupts in slave mode.

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