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bf537-stamp (cut norflash add spi and nand flash)

Question asked by linux_rookie on Nov 26, 2013
Latest reply on Nov 26, 2013 by Aaronwu

Good afternoon Engineer:

I have encountered some problems in the modified u-boot. I had got bf537-stamp from ADI,but it just has norflash and use up all banks.

Now I had changed the board setup from spiflash(m25p32). But nandflash(K9F1G08) dones't work very well.

the uart message :

U-Boot 1.1.6 (ADI-2008R1) (Nov 26 2013 - 11:41:05)

CPU:   ADSP bf537-0.2 (Detected Rev: 0.3)
Board: ADI BF537 stamp board
       Support: http://blackfin.uclinux.org/
Clock: VCO: 600 MHz, Core: 600 MHz, System: 120 MHz
RAM:   64 MB
Flash:  4 MB
In:    serial
Out:   serial
Err:   serial
NAND:  NAND device: Manufacturer ID: 0xec, Chip ID: 0xf1 ( NAND 128MiB 3,3V 8-bit)
NAND bus width 8 instead 16 bit
0 MiB
Net:   Blackfin EMAC
MAC:   00:E0:22:FE:64:D3
I2C:   ready
Hit any key to stop autoboot:  0

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

bfin> nand bad

no devices available

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

bfin> nand erase

no devices available

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

I had changed: (u-boot-1.1.6-2008R1/include/configs/bf537-stamp.h)

 

#define BFIN_BOOT_MODE       BFIN_BOOT_SPI_MASTER (change)

#define CONFIG_BF537_NAND (add)

......

#elif (BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)

#define CONFIG_COMMANDS  (CONFIG_BFIN_CMD | \

    CFG_CMD_NAND    | \ (add)

    CONFIG_JFFS2_CMDLINE | \(add)

     CFG_CMD_ELF | \

     CFG_CMD_I2C | \

     CFG_CMD_CACHE  | \

     CFG_CMD_JFFS2 | \

     CFG_CMD_EEPROM | \

     ADD_IDE_CMD | \

     CFG_CMD_DATE)

......

#define BFIN_NAND_READY  PF7 (change(PF3))

#define NAND_WAIT_READY(nand)     \
do {      \
  int timeout = 0;   \
  while(!(*pPORTFIO & PF7))  \(change(PF3))
   if (timeout++ > 100000) \
    break;  \
} while (0)

......

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