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SPI Interrupt Inconsistency (Debugger vs Flash)

Question asked by MtBurt on Jun 15, 2010
Latest reply on Jul 3, 2010 by PrasanthR

Hello,

 

I'm having an issue running the BF561 in SPI slave move in release mode via the debugger vs stand alone.  I'm handling the byte transfer interrupts manually (no DMA) and noticed that I get a good transfer every time when I run via the debugger but compiled for release and running from the parallel flash on my board I don't receive every byte sent by the master.

 

I've traced it to being a problem with the interrupt consistency. Apparently the ISR is inconsistent when running stand alone, but uniform when using the debugger.  I was wondering if anyone knows why that is and what I can do to stabilize the stand alone operation.

 

I've attached two pictures.  The first  is the operation with the debugger, the second is without.  The traces are:

 

1) MOSI

2) Slave Select

3) SCLK

4) GPIO which toggles at beginning of SPI ISR.

 

IMAG0152.jpg

IMAG0153.jpg

 

Thanks in Advance.

 

 

-Matt

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