For the TS201, I have a C function that I want to use as an ISR. I have used #pragma interrupt_reentrant to do this. Now I want to take the assembler code generated by the C compiler and use that via inline assembler code instead of using the C pragma.
I have some questions about the ISR prologue/epilogue code generated by the compiler.
The prologue starts as follows.
nop; nop; nop; nop;;
[j27 += 0XFFFFFF80] = cjmp;;
Q [j27 + 0XC] = j27:24;;
1. What is the purpose of the first instruction line full of nops?
My ISR calls another function. The generated code around the call looks like this:
IF true, CALL IntHandlerHw; Q [j27 + 0X4] = j27:24; Q [k27 + 0X4] = k27:24;;
IF true, JUMP 0x1;;
cjmp = [j26 + 0X40];;
xr3:0 = Q [j27 + 0X48];;
xtr3:0 = r3:0;;
2. What is the purpose of the line of two nops?
3. What is the purpose of the IF true, JUMP 0x1 instruction? Actually, I have seen this often in the compiler-generated assembler code, not just in ISRs.