What is the video format of the MIPI CSI-2 output from the ADV728x family of video decoders ?
The front end of the ADV728x-M converts the analog video signal into an 8-bit ITU656 video stream (8 bit YCrCb 4:2:2).
The 8-bit ITU656 video stream is fed into a MIPI CSI-2 Tx and D-Phy Tx, The MIPI CSI-2 Tx and D-Phy Tx serializes the video stream and outputs the video stream over a MIPI CSI-2 link. See attached diagram.
Note however that the MIPI CIS-2 link remain in the 8 bit YCrCb 4:2:2 color space.
Also note that the MIPI CIS-2 link retains the line and frame timing of the ITU656 specification
e.g. frame rate output is 50Hz for PAL and 60Hz for NTSC inputs, in interlaced mode odd frames have one extra line than even frames.
Thanks, Rob. A couple follow-on questions:
1) Will the "swap pixel" (SWPC @ 0x27) function work for the MIPI parts as it does for the non-MIPI part? (An earlier rev HW manual suggests it doesn't work for MIPI parts, but I didn't see that in the latest version.
2) When i-->p is used, does the data remain in the same 4:2:2 form but at twice the rate, and with line interpolation used to fill in the lines whose parity isn't represented in each (odd or even) field?
3) Does the "2" in "I2P" (the syntax shown in the datasheet) mean "squared" (i.e. two instances of letter "I"), in the same way that "I2C" means "IIC" and "I2S" means "IIS", or is this just texting-like shorthand? (I prefer to reserve the use of 2 for cases where it has this kind of meaning, and can be more precisely shown in superscript.) If it does have meaning, what does "IIP" stand for?
1) Yes the SWPC bit at User Map, Register 0x27 bit  does work for MIPI and TTL parts. This swaps the Cr and Cb samples. I will add this description to the ADV728x hardware manual.
2) When the I2P mode is used the data remains in a YCrCb 4:2:2 format. I2P works by 'line-doubling' i.e. outputting the same line twice and doubling the MIPI CSI-2 clock speed. Note we have some clever smoothing filters that remove low angle noise.
3) I2P is shorthand for "Interlaced to Progressive converter".
Just one thing left to clarify. I suggested "interpolation" as the general means by which the missing-parity lines get filled in for a given field. But you used the phrase "outputting the same line twice" - i.e. the most basic deinterlacing technique and didn't comment on my characterization of "interpolation" as the method used. But then you further suggested "clever smoothing filters".
So I'm interested to understand more specifically about the "I2P" block: For an odd field being processed by I2P is line 2 a repeat of line 1 with some filtering based on that line's content, only? ...or is there some interpolation (plus whatever smoothing filters) based on line 1 and line 3 to determine the contents of line 2? (Given that our decoders have 3 or 5-line filtering already, I'd expect the I2P block probably interpolates.)
Sorry for the delay I am very busy at the moment.
Yes you are correct. Interpolation is used in the I2P algorithm.
I will create a separate forum page about how I2P works once I get a chance.
Assuming NTSC input, interlace signal out from adv7282-m csi2- tx.
Could you advise how back end processor w/csi2-rx to know field timing(such as odd or even) like bt656, Is it embedded in MIPI-CSI format?
Could you post this question on a separate thread. This thread is getting overwhelmed with questions.
Also could you rephrase the question. I don't quite understand what you are asking.
thanks and regards,
Just created a thread
ADV728x-M : Field bit on MIPI-CSI2 format
Retrieving data ...