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[ADuC7061] What is variation of PLL output over temperature?

Question asked by Mack on Nov 15, 2013
Latest reply on Nov 21, 2013 by MMA

Hello,

 

ADuC7061 has internal PLL and it generates 10.24MHz to be offered to core. 

I wonder what the variation of PLL's output clock rate is over temperature.

 

Best Regards,

Mack

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