Someone via email was asking me.
I know the AD9361 includes digital I/Q correction. Is there a document that describes how this is done inside the chip that is public?
Information on I/Q correction is available in three documents:
1. AD9361 Calibrations
2. AD9361 Register Map
3. AD9361 Datasheet
In the Cal manual -- it states:
In the continuous running mode, the calibration will use RX data to minimize the quadrature error continuously.
but it doesn't say actually how? Is the algorithm documented anywhere? or is it magic/a secret (which is an Ok answer). I'm assuming it works better for some modulation schemes than for others...??
Detailed algorithm operation is Analog Devices proprietary information. We are not aware of any performance sensitivity to modulation type.
Over what instantaneous bandwidth is the stated datasheet IQ error maintained? 56MHz? or just a spot frequency?
The specification is stated at a frequency and I/Q correction is not uniform across the whole bandwidth.
The performance will depend on the part configuration. It is recommended to measure performance using our evaluation platform using your custom configuration.
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