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ADUC7023- Clarifications MIPS, JTAG,BootMode

Question asked by FreddyS on Nov 8, 2013
Latest reply on Nov 11, 2013 by ABuda
Branched to a new discussion

1- What is the MIPS in case of

   - External clock source up to 44 MHz is used and

   - 41.78 MHz PLL with programmable divider

2- JTAG- Pins utilization

   - During Debug/download - Do we need all the JTAG pins? The question is regarding pins connections during active mode and during download/debug mode.

3- Is there any material as application note using the JTAG ? active mode and  Bootmode.

4- Temp sensor- What is the resolution.

Thanks 

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