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How to improve AD8346 performance considering its SSB phase noise

Question asked by Hao on Jun 9, 2010
Latest reply on Jun 23, 2010 by THA

I am considering the impact of discrete spur emission and SSB phase noise of this part. Could you please suggest if there is a way to reduce these sprurs by adjusting the relative phase of the I and Q input and by adding DC offsets on the I and Q inputs? I am trying to meet the requirement shown below.

 

Offset from transmit carrier frequency (Hz)

SSB Phase noise limit in 1 Hz bandwidth (dBc)

10

-35

100

-55

1,000

-73

10,000

-75

100,000

-90

>100,000

-90

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