I want to configure the AD-FCOMM1 card with the following specs
DAC sampling rate 64MHz and 100MHz
ADC sampling rate 4/8/16/64 MHz
RF Frequency 400-500 MHz( both TX and RX side).
How can i get those values??
The simplest way is to set the defInit struct ( https://github.com/analogdevicesinc/no-OS/blob/master/fmcomms1/Common/main.c#L68 ) according to your requirements.
Otherwise, you can call the specific functions:
- for DAC sampling rate - XCOMM_SetDacSamplingRate();
- for ADC sampling rate - XCOMM_SetAdcSamplingRate();
- for TX center frequency - XCOMM_SetTxFrequency();
- the RX center frequency - XCOMM_SetRxFrequency().
Take a look over the wiki description: http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/software/baremetal
Thanks for the reply. Another thing is that i have made a qpsk transmitter and reciever in fpga( Altera ) , and i wanted to know is there any way so that i can add my design in the existing no-OS code (by fully or partially replacing the the existing PCores).
All the parts are configurable through I2C (the parts are SPI compatible - but between them and the FPGA we have a microcontroller that converts the I2C commands into SPI commands), so first you have to implement the I2C_Init(), I2C_Read() and I2C_Write() functions for your platform.
Take a look at the following files:
After that, all the parts should work, except the AD9122 for which the driver is using the DAC pcore for SED calibration. For DAC, you will have to also implement the cf_axi_dds_set_sed_pattern() function https://github.com/analogdevicesinc/no-OS/blob/master/fmcomms1/AD9122/cf_axi_dds.c#L324 .
I think that these are the main steps.
You are saying that i have to put DAC core in my design??
Also, i dont have much idea about SED calibration.Can you throw some light on it.
The input DAC data can be compared with some comparison values (registers 0x68 - I0 LSBs, 0x69 - I0 MSBs, 0x6A - Q0 LSBs, 0x6B - Q0 MSBs, 0x6C - I1 LSBs, 0x6D - I1 MSBs, 0x6E - Q1 LSBs, 0x6F - Q1 MSBs). If the input data and the comparison values don't match, a global error bit is set. Reading the Errors Detected registers (0x70 - SED I LSBs, 0x71 - SED I MSBs, 0x72 - SED Q LSBs, 0x73 - SED Q MSBs) we can also find which bits were received in error (take a look at Sed Operation section from the AD9122 datasheet for more information).
We are using this SED circuitry to tune the DCI (https://github.com/analogdevicesinc/no-OS/blob/master/fmcomms1/AD9122/AD9122.c#L284) - we are trying to find for which DCI delay (register 0x16) we are getting no errors.
So if you want to use our AD9122 driver without changes you have to also implement the pcore_set_sed_pattern().
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