I'm migrating one of my projects from a SHARC 21369 to a TigerSHARC TS201S for processing and memory reasons. We have here a TS201S EZ Lite kit with two processors.
TS201 doesn't have SPORTs as 21369 does and I need to interface a 2-bit 16 MHz A/D converter.
Two options came to my mind:
- Use processor's A FLAG0_A ~ FLAG3_A to manually read the A/D (CLK generating interrupts on processor e two pins with A/D data to be read) and store information on SDRAM so that I can process it with processor B;
- Use the onboard CPLD on connector P6 to read the A/D and send data to the memory using DMA (through external port).
For each option I have a concern:
- May FLAG pins capable of both generate interrupts and read data at 16 MHz frequency?
- At which level need we change CPLD's project to achieve the necessary functionality to implement solution ?
I accept new ideas.