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AD-FMCOMMS1_EBZ on ZC702 Demo Fails ADC Communication Test

Question asked by lin_r on Oct 24, 2013
Latest reply on Oct 29, 2013 by lin_r

Hi everyone,


I’ve been trying to get the demo test to work on ZC702 with AD-FMCOMMS1_EBZ (no os) and am having a tough time doing it.


I’ve had the most luck with the pre-compiled bit and elf files from the posting below (I believe it’s HDL1?? even though HDL2 is recommended), and with that, I run into ADC communication errors.


The messages are below. I’ve tried debugging it as best as I can, and it looks like the DMA transfer is never started/finished. It looks like the S2MM_SR.IDLE bit is never set high (transfer done), and I suspect it has something to do with how the AXI DMA core is initialized. The DMA transfer never occurs. I also tried a dummy test using dma_1 with the Xilinx supplied example code (xaxidma_example_simple_poll.c), and that doesn’t work for the same reason (DMA core is always “busy”). I’ve seen postings where people had similar issues and it turned out to be issues with how the AXI DMA core was set up in coregen/etc.


I see that others have had this issue on VC707 as well as ZC702 and the issue as yet has been unresolved.


EXAMPLE ADC Communication Test Errors (all test modes fail other than 5/6 probably because the data is loosely checked for 5/6)


adc_test: mode( 1), format( 1)

  ERROR[ 0]: rcv(AA37115C), exp(00000000)

  ERROR[ 1]: rcv(685DDEA6), exp(00000000)

  ERROR[ 2]: rcv(E463D0BD), exp(00000000)

  ERROR[ 3]: rcv(FB1A53F9), exp(00000000)

  ERROR[ 4]: rcv(F5A1424D), exp(00000000)

  ERROR[ 5]: rcv(0A34F1A1), exp(00000000)

  ERROR[ 6]: rcv(8BF04816), exp(00000000)

  ERROR[ 7]: rcv(79476193), exp(00000000)

  ERROR[ 8]: rcv(8414151C), exp(00000000)

  ERROR[ 9]: rcv(5BF26AF4), exp(00000000)

  ERROR[10]: rcv(BA377B68), exp(00000000)

  ERROR[11]: rcv(A0D6970C), exp(00000000)

  ERROR[12]: rcv(421E218C), exp(00000000)

  ERROR[13]: rcv(9C95FC23), exp(00000000)

  ERROR[14]: rcv(596B5CE9), exp(00000000)

  ERROR[15]: rcv(544CB38F), exp(00000000)

  ERROR[16]: rcv(9869F1F5), exp(00000000)

  ERROR[17]: rcv(48150B4A), exp(00000000)

  ERROR[18]: rcv(0A5D1FBE), exp(00000000)

  ERROR[19]: rcv(4D1E6151), exp(00000000)

  ERROR[20]: rcv(869251C5), exp(00000000)

  ERROR[21]: rcv(5B69E678), exp(00000000)

  ERROR[22]: rcv(8DF3DC00), exp(00000000)

  ERROR[23]: rcv(7B0D0A87), exp(00000000)

  ERROR[24]: rcv(D357FC9B), exp(00000000)

  ERROR[25]: rcv(46C02984), exp(00000000)

  ERROR[26]: rcv(FCB97B1B), exp(00000000)

  ERROR[27]: rcv(566CC1E0), exp(00000000)

  ERROR[28]: rcv(47E83ADF), exp(00000000)

  ERROR[29]: rcv(C85CC6F0), exp(00000000)

  ERROR[30]: rcv(716CD650), exp(00000000)

  ERROR[31]: rcv(9A9933C3), exp(00000000)


I tried taking the sources and recompiling through XPS, but the compiled bit file yields “I2C Communication” errors.


I have several questions:

  1. Any ideas what I can do to fix the ADC communication test?
  2. What version of the hdl and the no-os code should I be using? I, in general, have no idea what source code I should / shouldn’t be using. I’ve tried the git sources posted on the wiki and various ones that have been included in the forums, but it’s all very confusing what’s going on.
  3. In looking at the test.c/adc_capture function, the DMA descriptors and registers are set. Why aren’t the BSP functions used to handle setting it up?
  4. Is there going to be support for Vivado anytime soon? I know Xilinx is not making it easy with the tool fragmentation (ISE/XPS/Vivado), but I need to get my work done on Vivado, and it doesn’t seem like there’s no support (yet)?


Thanks in advance!