I use the 16bit Raw pixel with JData mode and verilog to program.
Now I find that my firmware can't be loaded.
I have done some test to confirm my read and write time sequence and the register firstly:
1). I write to PLL_HI register 0x0008 and PLL_LO register 0x0084, what I read back is 0x0088 and 0x0084.
Is this right?
2). I also write numbers to other registers ,when I read back some is right some is wrong. I read some tips you have give, it tells that
some register might can't be read. So I write STAGE 0x0005 and ADDR 0x0000. Then what I read back from STAGE register is 0x696c ,
and ADDR is 0x0000. Then I also do some test with STAGE and ADDR as below:
write: STAGE ADDR read: STAGE ADDR
0005 0001 696C 0001
0005 0002 4A75 0002
0005 0003 4A75 0003
0005 7000 FFFF 7000
Is the STAGE register is readalbe? From the result of ADDR, I think my read and write time sequence maybe right, where may go wrong?
The register I configure it at this step as below:
BUSMOD = 0X0005 MMODE = 0X0005 PLL_HI = 0x0008 PLL_LOW = 0084
MCLK = 2MHZ(divided from 30MHZ, someone tells me 30M may too fast)
VCLK = 82MHZ
3). When I have written the Firmware to ADV212, I can't read it back, the HDATA bus remain unchange. 1), 2) may be the reasons. Is there
something else may lead to this?
Eager for your reply