I want to simulate how much capacitive load the clock signal can drive without degrading amplitud and rise time. Thanks.
There is, I'll PM it to you.
I am wondering if you could also send them to me?!. I am currently - I know so much time has elapsed since the post was created - involved with a project containing ADV7441A and I'm unable to get its HDMI working. I guess there may be something wrong with the hardware. And, I am going to start from analyzing designed PCB.
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