Dear ADI engineers,
I’m evaluating ADRF6850 on a self designed PCB based on the proposed test circuitry contained in the data sheet. Everything is working fine. Now I want to do some tests bypassing the internal PLL using the TESTLO inputs. My problem is, that I don’t know how to change the programming of the chip for this. I guess that it is reasonable to power down the PLL, but I need to know what else has to be done. Unfortunately I haven’t found any hint on that in the documentation.
I would be grateful for any advice.