AnsweredAssumed Answered

AD9512 Clock Divider Comms Problem

Question asked by dannybeckett on Oct 8, 2013
Latest reply on Oct 14, 2013 by Kyle.Slightom

Hello,

 

I have prototyped an AD9512 on a double layer PCB before it's integrated into an existing project. The schematic & layout are as follows:

 

N3Tef[1].jpg

The device powers on with no problem. I'm using an explorer16 pic dev kit to write to the chip. The SPI seems to be operating without issue. When I power the chip on, I get a 30MHz clock output from pin 35, divider 3, from a 60MHz clock in. This is correct since the default values cause the dividers to operate at /2:

 

screenshot4.bmp

 

I cannot get the chip to do anything via SPI serial commands. I am writing out the following sequence:

 

*CS low*

0x00     // write, 1 data byte

0x51     // divider 3 config buffer address

0x80     // bypass divider

*CS high*

*CS low*

0x00     // write, 1 data byte

0x5A     // update registers address

0x01     // update registers

*CS high*

 

This sequence does not alter the output of the chip whatsoever. The following screenshots are of the SPI lines going to the chip.

 

Blue = CSB

Purple = SDIO

Green = SCLK

 

screenshot1.bmp

screenshot2.bmp

screenshot3.bmp

 

A read of the chip causes erreonus outputs to occur. I am not sure why this happens.

Outcomes