Please let us know urgently on what is the maximum allowed Tolerance for the Input Crystal Clock Frequency at teh XTALp input pin of ADV7611W, when the HDMI Receiver port is used to receive only 480p HDMI Resolution.
Currently, the variation on both sides of the Crystal Clock (expected nominal: 28.63636MHz) is very high.
In our design the Output Video bus is configured for 8-bit SDR mode; hence at 480p (720x480 or 640x480) HDMI Input, the output LLC Clock frequency is around 55MHz.
Please advice the maximum allowed tolerance for the Crystal Clock frequency in the above stated mode of operation.
Thansk & Regards,