I have the IDP/PDAP unit successfully reading data from the PDAP (which hooks to an ADC) and accessible by reading the IDP_FIFO with the core. However in my tight synchronized inner processing loop the reading the IDP_FIFO peripheral register with the core directly is very expensive (6 to 7 core cycles).
I'd like to use the IDP_DMA to transfer IDP_FIFO to a single data memory location then read this memory location with the core instead of reading the IDP_FIFO (with a cost of 1 core cycle).
However, I find the IDP DMA description very lacking of detail in the Hardware Reference Manual. Any example code for setting up the IDP DMA?
This is what I want to accomplish:
- Any time data is sitting in the IDP_FIFO DMA it to a fixed location in data memory
- No interrupts should ever be generated
- I want this to run indefinitely, hopefully with no other processor intervention to reload DMA registers
It looks like I should be able to use Standard DMA with a count of 0xFFFFFFFF and Modify of 0, but I would have to reload the count register before it hit zero.
Looks like I might be able to use ping-pong DMA, but it's not clear exactly how to use this.