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Data bus through AMI (lower 8 bits acting differently than the upper 8 bits)

Question asked by MarcZ on Oct 1, 2013
Latest reply on Oct 24, 2013 by Harshit.Gaharwar

Hi,

 

We have connected a parallel digital to analog converter to the data bus and we are using the AMI to access it. Our AMI setup is as follows:

 

*pAMICTL3 = ( AMIEN | BW16 | PKDIS | WS5 | HC2 | AMIFLSH | PREDIS);

We have noticed that the lower 8 bits of the data bus act differently from the upper 8 bits. For example, when running the following code:

 

volatile short *DAC_Address_Signed = (short*)0x0C000008;

    for(i=0; i<65536; i++)

        DAC_Address_Signed[0] = i;

 

What we see is that D0 has a high frequency squarewave, D1 has a squarewave of half the frequency, D2 is half the frequency of D1, etc. all the way to D7. But these are always a sqaurewave. Starting with D8 all the way to D15, the waveform is no longer square. The bus seems to return to 0V in between accesses, so that it looks like a noisy mess. It does function, but it just seems like an awful lot of energy is being wasted by doing this.

 

Is there any way to make the D8 through D15 work like D0 through D7?

 

Thank you,

Marc

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