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PPI setup to receive data from FPGA (1 external frame sync)

Question asked by mshearer123 on May 26, 2010
Latest reply on Jun 8, 2010 by hackfin

Hi,

 

I am working on a project which involves transferring data to (PPI0) and from (PPI1) an FPGA.

I have configured and tested my outgoing PPI on a development kit.

 

I am not having as much luck when testing PPI1 for Rx against an FPGA which is continually transmitting data.

 

In an attempt to test the PPI1 i have used the "Video Input-Output (C)" project, switched the PPI1 to Rx and removed unrequited parts of the project. Would it be possible for someone to have a quick glimpse over the code to see if anything is obviously wrong?  My intention would be to place a breakpoint in the interrupt to check if the array has been filled.

 

As far as i can tell the PPI process is

1.configure PPI

2.configure DMA

3.configure and activate interrupts   (which i didn't know was necessary as i assumed this happened automatically with the DI_EN bit)

 

4. enable DMA

5. enable PPI

6. wait for completion

 

Is there anything else required? clocks set up? interrupts?

 

thanks for any help,

 

Matthew

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