We have a high speed data acquisition system and have two clocks to choose from, and we don't want to use jumper so need a clock mux IC. can you recommend a chip to use? The addition jitter should less than some ten fs.
The ADCLK950 will fan out 1 of 2 reference inputs controlled by an external pin. How many outputs do you need?
Additive broadband jitter will be on the order of 75fs. Is your 10fs requirement broadband or a smaller integration range (for example 12kHz-20MHz)?
If you only need one output, the ADCLK907 gets you about 60 fs. Keep in mind jitter adds in RSS form, so if the rest of your clock chain sits at 175 fs, then adding a 60 fs element in only increases the system jitter by 10 fs.
Maybe I am confused. It seems ADCLK907 is two-input/two-output, but I need two-input/one-output. Maybe I should wire-or those two output ports?
BTW, can we use RF SPDT switch ADG936R for this purpose?
Sorry, I was confused. I misread your need. We do not have a simple 2 in, 1 out buffer. If your signals are single-ended, the closest device we have is the AD9508. for differential 2:8, so it has more outputs than you need, but would work.
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