What is the SPI default mode after power on, slave or master?
We found ADV7623 is master as default.
Is there any reason for it?
The feedback I've had from design is that the EDID controller drives the SPI lines for the activity we discussed in the earlier post. It then releases the SPI lines and will not take control of them unless a SPI EDID reread or store is triggered from the part.
After that, the SPI lines are available to the OSD controller.
That is all of the information I have available at the moment.
ADV7623 SPI mode will be slave by default. Please refer to section 7.2.3 of the ADV7623 hardware manual or section 6.3 of the OSD Software programmer guide for more details.
But we found ADV7623 SPI mode was master at first and don't know why.
Will it be master only when the user set 0x60 to 1 ?
ADV7623 SPI mode will be slave by default. It will be master only when the user set 0x60 to 1.
Is the board you are referring to is ADV7623 Evaluation board or your custom board.
It is our prototype board.
After power on and Reset release ADV7623 apears as master and SPI_CLK is coming out.
We did not do any I2C control.
Because of this we can not control ADV7623 by external CPU.
We need your advice without knowing why this happens.
After power on, hope you are not running any software.
How did you conclude SPI_CLK is coming from ADV7623.
Is any other SPI control is tied to the CPU. If so, can you please remove those SPI connections and have the SPI interface only between CPU and ADV7623.
Can you please read the below registers and let us know the values in it.
OSD map registers 0x60 and 0x66.
IO map register 0x1F
No CUP and ROM are connected to the SPI but we found signal was coming out from CLK, CS and MOSI.
The register values:
Do you observe continuous SPI clock or only for few cycles.
We observed it about 5msec after power on.
Please refer to the attached file.
This may be due to the SPI EDID loader in action after the part comes up.
ADV7623 can automatically load an EDID from an SPI EEPROM at startup depending on how some external lines like PWRDNB are tied.
We would like to know more detail on the sequence of PWRDNB,SPI and other pins after power-on.
Is there any section and timing diagram we should refer to?
My understanding is next SPI cycle where ADV7623 should be slave will start after PWRDNB was disabled.
Is that right?
If there was not any document that describes the sequence please describe it as follow for exsample:
1) Power on.
2) SPI gets into master mode and loads EEPROM data if PWRDNR was low.
3) After EEPROM data load was finished and PWRDNB was disabled, SPI gets into slave mode.
Please distinguish things which is done automatically and ones which require manual operation or user programming in the description.
After the ADV7623 starts up, it will always try to read EDID data from an attached SPI memory. It is configured this way because, in our experience of older HDMI sources, it occasionally occurred that a source would seek the EDID prior to the receiver asserting hot plug. This feature allowed a receiver to populate the internal EDID space within milliseconds.
The ADV7623 will perform as the master on the SPI lines for the time required to retrieve the SPI EDID. I've attached a scope trace of this happening - it takes about 5ms. In this trace, the yellow line is the SPI clock, the blue line is the PWRDNB pin and the pink line is the 3.3V supply.
Unfortunately there is no means of disabling the functionality - ADV7623 will always do this. There is no further timing details for this functionality.
Thank you for your detailed explanation.
But we would like to know the whole sequence,especially how ADV7623 SPI get into slave mode after the EEPROM read.
The fomer answer said "ADV7623 SPI mode will be slave by default. Please refer to section 7.2.3 of the ADV7623 hardware manual."
How the slave mode(default) happens?
Thank you for the information .
Please close this issue.
But we found ADV7623 was master on our board even though the manual
describes it is slave by default.
Do you think of anything what make it master on our board?
Thanks and regards,
聡 香山 <firstname.lastname@example.org>
New message: "ADV7623 SPI default mode"
Re: ADV7623 SPI default mode
created by Wahida in Video - View the full discussion
ADV7623 SPI mode will be slave by default. Please refer to section 7.2.3
of the ADV7623 hardware manual or section 6.3 of the OSD Software
programmer guide for more details.
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