I have a few questions regarding phase adjustment using the ADF4351 PLL/Synthesizer.
1) What is the difference between Phase Adjust and Phase Resync? Is it correct that when the Phase Adjust bit in R1 is set the phase of the output signal is shifted by the current phase value relative to the current output phase while the Phase Resync fuction allows to always settle the output to a fixed phase offset relative to REFin?
2) I am using the ADF4351 in integer-n mode, i.e. FRAC is always 0, and use the test setup MUXOUT=111 and Bit17=1 in R5 to enable phase shifting. This works, but not very reliable. When I update the registers with the same settings sometimes the PLL locks and I get the output signal with the desired phase relation, other times the PLL fails to lock with the same settings. Any ideas what might be the reason for this? Are there other ways to enable phase shifting in integer-n mode?
3) Does the ADF4351 have the possibility to synchronize the LE signal to the REFin signal as in the ADF4159. Which problems might arise if the LE signal is not synchronized to the REFin signal?
Thanks and best regards,