Dear Members and the Employees of Analog Devices;
I am trying to use ADV7511 reference design on KC705 using ISE 14.6. However the design stops working if I regenerate the netlist & bitstream for the given designs WITHOUT any modifications.
Here is what I do:
1) I got all the files from the github, and the ISE project files
2) Using the SDK\SDK_Workspace\hw\system.bit and SDK\SDK_Workspace\hw\system_bd.bmm, I program the FPGA. Everything works great! I can see the image and change resolution.
3) I generate the netlist and the bitstream in EDK environment. Please note that I didn't make any changes. If I program the FPGA with these new files, \implementation\system.bit and implementation\system_bd.bmm. Please note that I didn't export hardware design to SDK. I used the old hw and bsps in the SDK_Workspace. I bet this is not recommended, but I didn't change anything in the EDK architecture anyways. Well, when I run the software, software runs perfectly! Image is there, and I can change the resolution.
4) However I like to "Export Hardware Design to SDK" and see it working because I will be doing some changes in the EDK in the future but not yet, Anyways, I click on the "Export Hardware Design to SDK" IN EDK. Then I program the FPGA with SDK\SDK_Workspace\hw\system.bit and SDK\SDK_Workspace\hw\system_bd.bmm. I cleaned and recompiled the software code, the run the software. The code does not return from "ADIAPI_TxInit(TRUE);" Therefore no images, nothing.
When I compare the files, system.xml has some differences, most likely due to the ISE version since I use ISE 14.6 rather than 14.4.
Since 3 works up there I am assuming that there is nothing grossly wrong with upgrading cores to 14.6, but when I "Export Hardware Design to SDK", SDK does not work anymore.
I have tried to solve this for the last 4 days with no avail. I would greatly appreciate your help to resolve this because I am trying to make a decision to use this chip in our next platform or not.
Great weekend to everybody,