I there any reasonable documentation explaining the difference between the hardware version ? So far I didn't find any clue on what I shall us.
HDL v2 ad_fmcomms1_ebz_edk_14_4_2013_03_23 and HDL v1 ad_fmcomms1_ver1__edk_14_4_2013_08_23. For instance I picked HDL v2 and try to open the project for a Zedboard ( cf_xcomm_zed ) it didn't went far because it looks some Pcores netlist can't be re-generated.
WARNING:sim:991 - The project IP instance 'ad_dds_1' for IP 'DDS Compiler v4.0' was generated with a different version of the IP than is currently in the IP Catalog. It was originally generated using IP with the packaged timestamp '2012-04-24+06:06'; the IP in the current catalog has a different packaged timestamp '2012-08-28+14:48'. This mismatch is due to changes made to the IP in the user repositories. It may affect some functionality of the IP, if there are differences between these two versions of the IP.
Generate XCO file
INFO:sim:172 - Generating IP...
Moving files to output directory...
Finished moving files to output directory
Saved CGP file for project 'coregen'.
ERROR:coreutil - Unable to set working directory to non-directory D:\XilinxTest\fpgahdl_xilinx-ad_fmcomms1_ebz_edk_14_4_2013_08_23\coregen.cgc\
WARNING:encore:218 - Unable to recustomize IP imported from D:\XilinxTest\fpgahdl_xilinx-ad_fmcomms1_ebz_edk_14_4_2013_08_23\cf_lib\edk\pcores\adi_common_v1_00_a\netlist\ad_dcfilter_1.xco
ERROR:sim:879 - Part 'xc7z020-1clg484' is not valid for component 'xilinx.com:ip:xbip_dsp48_macro:2.0'.
Extra question which nOsSoftware version is matching HDL1 and HDL2.