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AD9957 system clock limitation in Blackfin mode

Question asked by Laid on Aug 25, 2013
Latest reply on Aug 26, 2013 by KennyG



The AD9957 datasheet is mentioning that sysclock is limited to a 750MHz when in blackfin mode.

Does this limitation come from the fact,that serial-to-parallel conversion will not otherwise satisfy the data throughput requirements for the full bandwidth specified for the AD9957 or is it that the conversion can not happen at all above 750MHz?


The question is basically, if the blackfin interface can still be used with 1GHz system clock speed (and have 400+MHz output from the chip) if the signal bandwidth is kept narrow enough?


Best Regards,