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DDS(AD9915) Register Read Operation

Question asked by hanseyo on Aug 21, 2013
Latest reply on Aug 21, 2013 by DSB


I am using 9 DDS devices for making phase simulation signals. These chips work well according to writing of configuration register. I conformed already that RD# and Address Signal send to DDS well. But I can't see any toggle in data path. DDS is configured by FPGA Logic and data signals of 9 DDS are connected by one data bus followed data buffer to FPGA.

Is there any problom or specific condition to read back the register I configured?